By Stéphane Donnay, Georges Gielen
This publication is the 1st in a chain of 3 devoted to complicated themes in Mixed-Signal IC layout methodologies. it really is one of many effects accomplished by means of the Mixed-Signal layout Cluster, an initiative introduced in 1998 as a part of the TARDIS venture, funded by means of the ecu fee in the ESPRIT-IV Framework. This initiative goals to advertise the improvement of recent layout and attempt methodologies for Mixed-Signal ICs, and to speed up their adoption by means of commercial clients. As Microelectronics evolves, Mixed-Signal concepts are gaining an important significance as a result of large unfold of purposes the place an analog front-end is required to force a posh digital-processing subsystem. during this experience, Analog and Mixed-Signal circuits are well-known as a bottleneck for the marketplace popularity of Systems-On-Chip, as a result of inherent problems all for the layout and try of those circuits. especially, difficulties bobbing up from using a standard substrate for analog and electronic elements are a first-rate proscribing issue. The Mixed-Signal Cluster has been shaped via a bunch of eleven learn and improvement initiatives, plus a selected motion to advertise the dissemination of layout methodologies, thoughts, and helping instruments constructed in the Cluster initiatives. the full motion, finishing in July 2002, has been assigned an total price range of greater than eight million EURO.
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The respective influence of the lightly doped and epitaxial wafers is detailed. Fabrication process steps changing the substrate characteristics are addressed for CMOS and bipolar technologies. Die attachment is considered as a means to reduce substrate parasitics. 1. INTRODUCTION With the increasing complexity of mixed digital-analog designs, and with the decreasing feature size of current technologies, taking into account parasitic coupling through the substrate has become a key issue in reducing time-to-market of new circuits [1, 2].
A continuous-time direct measurement technique is the use of an analog differential amplifier, with one input connected to the substrate and the other to a quiet reference signal [7],[21]. The sensor presented in [21] has only a limited bandwidth, and measurement of actual coupling from switching digital nodes is not possible due to this bandwidth limitation. The substrate noise sensor used in our experiments [7] is a differential amplifier with one input connected to a quiet ground and the other input connected to the substrate.
Yu, CAD - Computer simulation of IC processes and devices, Kluwer Academic Publishers, 1993. [4] R. M. Warner and B. L. , 1991. [5] J. Y. Chen, CMOS devices and technology for VLSI, Prentice-Hall, 1990. [6] R. R. Troutman, Latchup on CMOS Technology - The problem and its cure, Kluwer Academic Publishers, 1986. [7] T. D. Dissertation, Stanford University, Department of Electrical Engineering, December 1997. 20 Substrate Noise Coupling in Mixed-Signal ASICs [8] A. Pun, T. Yeung, J. Lau, F. J. R. Clément and D.