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Cryptographic Hardware and Embedded Systems - CHES 2009: by Emilia Käsper, Peter Schwabe (auth.), Christophe Clavier,

By Emilia Käsper, Peter Schwabe (auth.), Christophe Clavier, Kris Gaj (eds.)

This publication constitutes the refereed lawsuits of the eleventh foreign Workshop on Cryptographic and Embedded structures, CHES 2009, held in Lausanne, Switzerland in the course of September 6-9, 2009.

The e-book comprises three invited talks and 29 revised complete papers that have been rigorously reviewed and chosen from 148 submissions. The papers are prepared in topical sections on software program implementations, facet channel research of mystery key cryptosystems, facet channel research of public key cryptosystems, part channel and fault research countermeasures, pairing-based cryptography, new ciphers and effective implementations, TRNGs and gadget identity, trojans and relied on ICs, theoretical points, and fault analysis.

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Extra resources for Cryptographic Hardware and Embedded Systems - CHES 2009: 11th International Workshop Lausanne, Switzerland, September 6-9, 2009 Proceedings

Example text

If ShiftRows is to be physically computed at all, this should be done at the beginning or end of the round, when only 1 register is live. Let rk denote a left rotation by k elements. To compute MixColumns, we compute x := (a, b, c, d) and 0x02 · x as above. We compute y := r1 (x) + 0x02 · x = (0x02 · a + b, 0x02 · b + c, 0x02 · c + d, 0x02 · d + a) We then compute the desired output r1 (y) + y + r3 (x) = (0x02 · a + 0x03 · b + c + d, . ) When using classical inversion, we compute 0x02· x before x, so we use a similar addition chain that rotates 0x02 · x first.

References 1. html 2. html 3. pdf 4. , Lange, T. to 5. : New AES software speed records. , Das, A. ) INDOCRYPT 2008. LNCS, vol. 5365, pp. 322– 336. Springer, Heidelberg (2008) 6. : AES power attack based on induced cache miss and countermeasure. In: ITCC 2005: Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC 2005), Washington, DC, USA, vol. I, pp. 586–591. IEEE Computer Society, Los Alamitos (2005) 7. : A fast new des implementation in software. In: Biham, E.

So to transfer 128-, 192-, and 256-bit AES keys, we need at least 26, 39, and 52 F31 blocks, respectively. Packing Fq -blocks into binary can be more “wasteful” in the sense that one can use more bits than necessary, as long as the map is injective and convenient to compute. For example, we have opted for a very simple packing strategy in which every three F31 blocks are fit in a 16-bit word. 2 Basic Arithmetic Operations and Inversion Mod q Fq operations for odd prime q uses many modulo-q. We almost always replace slow division instructions with multiplication as follows.

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